Session VII: Beyond Moore: An Arm vision for post-Exascale computing

With the end of lithography scaling as a key driver for technology improvement and the end of Dennard scaling, improvements in application performance will increasingly come from customized memory hierarchies and accelerator devices. No matter what form the accelerators take or the type of memory hierarchies take, the clear question remaining is how to deal […]

Session VII: Into The Wild: Integrating non Von Neumann Computing Into HPC

A perfect storm of semiconductor lithographical challenges combined with power package limitations due to the death of Dennard scaling have resulted in the end times for von Neumann architectures. But there is hope by using novel ways to compute. Well researched and risk adverse approaches involve using fixed-function accelerators, including reconfigurable (FPGA) accelerators, for key […]

Session VII: Beyond Exascale: Playing the CMOS Endgame

At a high level, systems built with the same massively parallel architecture, based on commercially available CMOS processors, have achieved Teraflop, Petaflop, and soon to be Exaflop performance.  They will not achieve Zettaflop performance, ever, as CMOS is approaching fundamental scaling limits.  This talk explores how system vendors will deal with the plateauing of CMOS, […]